Designation/Position- Sr. Project Scientist Position
IIT Kanpur, India invites application for Sr. Project Scientist Position at IIT from eligible and interested candidates
Senior Project Engineer – Compiler Development (RISC-V DSP & AI Architecture)
Summary
The Department of Computer Science and Engineering, Indian Institute of Technology Kanpur (IIT Kanpur), invites applications for the position of Senior Project Engineer under a strategic R&D project. The role involves leading the technical execution of a production-grade compiler targeting advanced RISC-V–based DSP and AI compute architectures with SIMD vector acceleration.
Summary Table
| Particulars | Details |
|---|---|
| Institute | Indian Institute of Technology Kanpur |
| Department | Computer Science and Engineering |
| Advertisement No. | P.Rect./R&D/2026/012 |
| Position | Senior Project Engineer |
| No. of Positions | 02 |
| Location | IIT Kanpur |
| Salary Range | ₹38,800 – ₹96,400 (Consolidated) |
| Working Hours | 9:30 AM – 6:00 PM |
| Appointment | 1 Year (Extendable) |
| Last Date to Apply | 28 January 2026 (Tentative) |
Designation
Senior Project Engineer
Research Area
- Compiler technologies
- RISC-V DSP and AI compute architectures
- SIMD vector acceleration
- Embedded systems and performance optimization
Location
Indian Institute of Technology Kanpur, Uttar Pradesh, India
Eligibility / Qualification
Eligibility
- Strong technical understanding of compiler technologies and DSP architectures
- Proven experience in agile project management and team leadership
- Excellent communication, negotiation, and stakeholder management skills
- Experience with project management tools and methodologies
Desired Qualification
- Master’s or PhD in Computer Science, Electrical Engineering, or a related technical discipline
Experience
- Minimum 4 years of experience managing complex software projects in compiler development, embedded systems, or signal processing
Job Description (Roles & Responsibilities)
- Plan, lead, and manage all phases of the compiler development lifecycle, including scheduling, budgeting, and resource allocation
- Coordinate multidisciplinary teams comprising compiler engineers, DSP/AI kernel developers, QA engineers, and infrastructure specialists
- Facilitate technical decision-making, risk mitigation, and stakeholder communication
- Collaborate with hardware design teams and external research organizations
- Ensure adherence to software engineering best practices, testing standards, and quality assurance procedures
- Report project progress and milestones to senior management and project sponsors
How to Apply
Interested candidates must apply online only through the Google Form provided below:
Application Link:
https://docs.google.com/forms/d/e/1FAIpQLSeF1glFSfsM7wQRWPnUv4S9ninY6O-T0Z8hx0MchiGOLDPDdw/viewform?usp=publish-editor
No hard copies of applications will be accepted.
Last Date for Apply
28 January 2026 (Tentative)
Job Post 2
Title
Project Scientist – LLVM Compiler Development for RISC-V DSP & AI Architecture
Summary
IIT Kanpur invites applications for the position of Project Scientist under an advanced R&D initiative focused on building a high-performance production compiler for RISC-V–based DSP and AI architectures with a 256-bit SIMD vector engine. The project supports next-generation 6G communication systems and cutting-edge compiler research.
Summary Table
| Particulars | Details |
|---|---|
| Institute | Indian Institute of Technology Kanpur |
| Department | Computer Science and Engineering |
| Advertisement No. | P.Rect./R&D/2026/013 |
| Position | Project Scientist |
| No. of Positions | 02 |
| Location | IIT Kanpur |
| Salary Range | ₹31,600 – ₹78,400 (Consolidated) |
| Working Hours | 9:30 AM – 6:00 PM |
| Appointment | 1 Year (Extendable) |
| Last Date to Apply | 28 January 2026 (Tentative) |
Designation
Project Scientist
Research Area
- Compiler backend development (LLVM)
- SIMD/vector processors
- DSP algorithms and domain-specific optimization
- RISC-V based AI compute systems
- 6G communication enabling technologies
Location
Indian Institute of Technology Kanpur, Uttar Pradesh, India
Eligibility / Qualification
Eligibility
- Strong understanding of instruction-level parallelism, code generation, and SIMD/vector optimizations
- Proficiency in C/C++ and systems programming languages (Rust desirable)
- Ability to work collaboratively in multidisciplinary research teams
Desired Qualification
- Master’s or PhD in Computer Science, Electrical Engineering, or related discipline with specialization in compiler design, software optimization, or embedded systems
Experience
- 3+ years of professional experience in compiler development, preferably using LLVM
Job Description (Roles & Responsibilities)
- Design and develop LLVM backend components including instruction selection, scheduling, and register allocation for multi-pipeline SIMD processors
- Implement advanced compiler optimization passes focused on vectorization and instruction-level parallelism
- Collaborate with frontend teams to support C, C++, and Rust language features and intrinsics
- Integrate debugging tools, testing frameworks, and continuous integration pipelines
- Ensure compiler quality, performance, and long-term stability
How to Apply
Candidates must submit their application online only through the following Google Form:
Application Link:
https://docs.google.com/forms/d/e/1FAIpQLSfQsk7k3iigE5ixIJGPOQ9R2XwAHOqKZhB5I8OC1Cmc4QUFKw/viewform?usp=publish-editor
Hard copy applications will not be accepted.
Last Date for Apply
28 January 2026 (Tentative)
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See Position Details (Project Scientist)-
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